In the computer art, there are a number of logic functions which are performed by circuitry, and any reduction in the amount of circuitry required to perform a given amount of logic operations is an advantage. One of the common logic functions performed in computers is the Exclusive OR (EOR) function. As the name implies, this function involves generating an output signal when one and only one of two possible input signals is present. Another commonly used logic function is known as the J-K flip-flop logic function.
As is well known to those skilled in the art, the operation of J-K flip-flops is such that if a binary 0 is applied to both the J and K terminals, a subsequent clock pulse will leave the flip-flop in its prior state. However, if a binary 1 is applied to both the J and K terminals, a clock pulse will enable the flip-flop so as to produce an output which represents a change of state from that which existed immediately prior to such enabling. That is to say, that if a J-K flip-flop were in a "clear" condition, which is the equivalent of a binary 0, and a binary 1 is applied to both the J and K terminals of the J-K flip-flop, a subsequent clock pulse would produce a change of state to binary 1 output from the J-K flip-flop. On the other hand, if the flip-flop had previously been in a "set" condition, which is the equivalent of a binary 1, and binary 1's were applied to both the J and K terminals of the J-K flip-flop, a subsequent clock pulse enabling the flip-flop would produce a change of state in its output so that it would produce a binary 0 output signal.
By contrast, if binary 0's are connected as the inputs to both J and K terminals of the J-K flip-flop, the flip-flop would remain in its prior condition producing no change of state output signal so that its output would comprise a binary 0, or a binary 1 dependent upon whether it had previously been in a "clear" condition or a "set" condition, respectively.
The application of a signal to the J input alone causes the flip-flop to assume the set or one state, while the application of a signal to the K input alone causes the flip-flop to assume the reset or zero state.
It would be highly desirable to be able to combine the EOR and J-K functions on a single circuit module and to be able to select either logic function by means of a control signal.